Invention Grant
- Patent Title: Nonvolatile memory multilevel cell programming
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Application No.: US18295504Application Date: 2023-04-04
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Publication No.: US11967368B2Publication Date: 2024-04-23
- Inventor: Tokumasa Hara , Noboru Shibata
- Applicant: KIOXIA CORPORATION
- Applicant Address: JP Tokyo
- Assignee: KIOXIA CORPORATION
- Current Assignee: KIOXIA CORPORATION
- Current Assignee Address: JP Tokyo
- Agency: Oblon, McClelland, Maier & Neustadt, L.L.P.
- Priority: JP 19210823 2019.11.21 JP 20113206 2020.06.30 JP 20144847 2020.08.28
- Main IPC: G11C11/56
- IPC: G11C11/56 ; G06F3/06 ; G06F11/10 ; G11C16/04 ; G11C16/10 ; G11C16/14

Abstract:
A memory system includes a nonvolatile memory which comprises a plurality of memory cells capable of storing 4-bit data represented by first to fourth bits by sixteen threshold regions, and a memory controller configured to cause the nonvolatile memory to execute a first program for writing data of the first bit, the second bit, and the fourth bit and then causes the nonvolatile memory to execute a second program for writing data of the third bit. In fifteen boundaries existing between adjacent threshold regions among the first to sixteenth threshold regions, a maximum value of the number of first boundaries used for determining a value of the data of the first bit, the number of second boundaries used for determining a value of the data of the second bit, the number of third boundaries used for determining a value of the data of the third bit.
Public/Granted literature
- US20230238059A1 NONVOLATILE MEMORY MULTILEVEL CELL PROGRAMMING Public/Granted day:2023-07-27
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