Invention Grant
- Patent Title: Analog computer architecture for fast function optimization
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Application No.: US17171824Application Date: 2021-02-09
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Publication No.: US11967951B2Publication Date: 2024-04-23
- Inventor: Ion Matei , Aleksandar Feldman , Johan de Kleer
- Applicant: Xerox Corporation
- Applicant Address: US CT Norwalk
- Assignee: Xerox Corporation
- Current Assignee: Xerox Corporation
- Current Assignee Address: US CT Norwalk
- Agency: Womble Bond Dickinson (US) LLP
- Main IPC: H03K19/17748
- IPC: H03K19/17748 ; G06G7/122 ; G06G7/32

Abstract:
An analog circuit for solving optimization algorithms comprises three voltage controlled current sources and three capacitors, operatively coupled in parallel to the three voltage controlled current sources, respectively. The circuit further comprises a first inductor, operatively coupled in series between a first pair of the capacitors and the voltage controller current sources and a second pair of the capacitors and the voltage controller current sources. The circuit further comprises a second inductor, operatively coupled in series between the second pair of the capacitors and the voltage controller current sources and a third pair of the capacitors and the voltage controller current sources.
Public/Granted literature
- US20210184680A1 ANALOG COMPUTER ARCHITECTURE FOR FAST FUNCTION OPTIMIZATION Public/Granted day:2021-06-17
Information query
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