A data processing circuit and a fault-mitigating method are provided. In the method, multiple sub-sequences are divided from sequence data. A first sub-sequence of the sub-sequences is accessed from a memory for a multiply-accumulate (MAC) operation to obtain a first computed result. The MAC operation is performed on a second sub-sequence of the sub-sequences in the memory to obtain a second computed result. The first and the second computed results are combined, where the combined result of the first and the second computed results is related to the result of the MAC operation on the sequence data directly. Accordingly, the error rate could be reduced, so as to mitigate fault.