Invention Grant
- Patent Title: Method for forming an IC including a varactor with reduced surface field region
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Application No.: US17324402Application Date: 2021-05-19
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Publication No.: US11978810B2Publication Date: 2024-05-07
- Inventor: Liang-Yu Su , Chih-Wen Yao , Hsiao-Chin Tuan , Ming-Ta Lei
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsinchu
- Agency: Eschweiler & Potashnik, LLC
- The original application number of the division: US16434381 2019.06.07
- Main IPC: H01L29/66
- IPC: H01L29/66 ; H01L27/08 ; H01L29/06 ; H01L29/93

Abstract:
Various embodiments of the present disclosure are directed towards a method for forming a varactor comprising a reduced surface field (RESURF) region. The method includes forming a drift region having a first doping type within a substrate. A RESURF region having a second doping type is formed within the substrate such that the RESURF region is below the drift region. A gate structure is formed on the substrate. A pair of contact regions is formed within the substrate on opposing sides of the gate structure. The contact regions respectively abut the drift region and have the first doping type, and wherein the first doping type is opposite the second doping type.
Public/Granted literature
- US20210273119A1 REDUCED SURFACE FIELD LAYER IN VARACTOR Public/Granted day:2021-09-02
Information query
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