Invention Grant
- Patent Title: Enhanced amplifier topology in an analog front end (AFE)
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Application No.: US17137685Application Date: 2020-12-30
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Publication No.: US11979116B2Publication Date: 2024-05-07
- Inventor: Sravana Kumar Goli , Nagesh Surendranath , Srinivas Bangalore Seshadri , Sandeep Kesrimal Oswal
- Applicant: Texas Instruments Incorporated
- Applicant Address: US TX Dallas
- Assignee: Texas Instruments Incorporated
- Current Assignee: Texas Instruments Incorporated
- Current Assignee Address: US TX Dallas
- Agent Valerie M. Davis; Frank D. Cimino
- Main IPC: H03F3/08
- IPC: H03F3/08 ; G01T1/175 ; H03L7/093 ; H03M1/60

Abstract:
In described examples, a circuit includes an integrator. The integrator generates a first signal responsive to an input signal. A trigger circuit is coupled to the integrator and receives the first signal. A charge dump circuit is coupled to the integrator and the trigger circuit. The trigger circuit modifies configuration of the charge dump circuit and the integrator when the first signal is greater than a first threshold.
Public/Granted literature
- US20220209722A1 ENHANCED AMPLIFIER TOPOLOGY IN AN ANALOG FRONT END (AFE) Public/Granted day:2022-06-30
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