Invention Grant
- Patent Title: Component-embedded substrate
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Application No.: US18186907Application Date: 2023-03-20
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Publication No.: US11979986B2Publication Date: 2024-05-07
- Inventor: Masakazu Sato , Nobuki Ueta , Yoshio Nakao , Masatoshi Inaba
- Applicant: Fujikura Ltd.
- Applicant Address: JP Tokyo
- Assignee: Fujikura Ltd.
- Current Assignee: Fujikura Ltd.
- Current Assignee Address: JP Tokyo
- Agency: Osha Bergman Watanabe & Burton LLP
- Priority: JP 18113498 2018.06.14 JP 19039846 2019.03.05
- Main IPC: H05K1/11
- IPC: H05K1/11 ; H05K1/18 ; H05K3/00 ; H05K3/40

Abstract:
A component-embedded substrate includes: a plurality of insulating layers each including a wiring pattern formed on one surface; an embedded component including a connection terminal; and a plurality of vias that electrically connect the connection terminal to the wiring patterns adjacent to each other in a lamination direction. The plurality of insulating layers is laminated on the connection terminal. Each of the plurality of vias is composed of a via hole formed in the respective insulating layer of the plurality of the insulating layers and a conductive material provided in the via hole. One of the plurality of vias is a connection via directly connected to the connection terminal. Another of the plurality of vias is a first adjacent via adjacent to the connection via in the lamination direction. The first adjacent via is connected to the wiring pattern formed on a surface of a top insulating layer.
Public/Granted literature
- US20230232532A1 COMPONENT-EMBEDDED SUBSTRATE Public/Granted day:2023-07-20
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