Invention Grant
- Patent Title: Memory device using semiconductor element
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Application No.: US17878485Application Date: 2022-08-01
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Publication No.: US11980022B2Publication Date: 2024-05-07
- Inventor: Masakazu Kakumu , Koji Sakui , Nozomu Harada
- Applicant: Unisantis Electronics Singapore Pte. Ltd.
- Applicant Address: SG Singapore
- Assignee: UNISANTIS ELECTRONICS SINGAPORE PTE. LTD.
- Current Assignee: UNISANTIS ELECTRONICS SINGAPORE PTE. LTD.
- Current Assignee Address: SG Singapore
- Agency: Crowell & Moring LLP
- Main IPC: G11C16/04
- IPC: G11C16/04 ; G11C5/06 ; G11C11/4096 ; H01L29/06 ; H01L29/78 ; H10B12/00

Abstract:
An n+ layer 3a connected to a source line SL at both ends, an n+ layer 3b connected to a bit line BL, a first gate insulating layer 4a formed on a semiconductor substrate 1 existing on an insulating film 2, a gate conductor layer 16a connected to a plate line PL, a gate insulating layer 4b formed on the semiconductor substrate, and a second gate conductor layer 5b connected to a word line WL and having a work function different from a work function of the gate conductor layer 16a are disposed on the semiconductor substrate, and data hold operation of holding, near a gate insulating film, holes generated by an impact ionization phenomenon or gate-induced drain leakage current inside a channel region 12 of the semiconductor substrate 1 and data erase operation of removing the holes from inside the substrate 1 and the channel region 12 are performed by controlling voltage applied to the source line SL, the plate line PL, the word line WL, and the bit line BL.
Public/Granted literature
- US20230039991A1 MEMORY DEVICE USING SEMICONDUCTOR ELEMENT Public/Granted day:2023-02-09
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