Invention Grant
- Patent Title: Semiconductor heterostructure with p-type superlattice
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Application No.: US16930819Application Date: 2020-07-16
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Publication No.: US11984529B2Publication Date: 2024-05-14
- Inventor: Mohamed Lachab
- Applicant: Sensor Electronic Technology, Inc.
- Applicant Address: US SC Columbia
- Assignee: Sensor Electronic Technology, Inc.
- Current Assignee: Sensor Electronic Technology, Inc.
- Current Assignee Address: US SC Columbia
- Agency: LaBatt, LLC
- Main IPC: H01L33/06
- IPC: H01L33/06 ; H01L29/00 ; H01L33/10 ; H01L33/02 ; H01L33/14 ; H01L33/32

Abstract:
A heterostructure for an optoelectronic device is disclosed. The heterostructure includes an active region including at least one quantum well and at least one barrier and an electron blocking layer located adjacent to the active region, wherein the electron blocking layer includes a region of graded composition. An asymmetric p-type superlattice layer is located adjacent to the electron blocking layer, wherein the p-type superlattice includes at least one superlattice period comprising a set of wells and a set of barriers. A thickness of at least one of: each well in the set of wells or each barrier in the set of barriers varies along a length of the p-type superlattice.
Public/Granted literature
- US20200350465A1 Semiconductor Heterostructure with P-type Superlattice Public/Granted day:2020-11-05
Information query
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