Invention Grant
- Patent Title: Semiconductor device patterning methods
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Application No.: US18096347Application Date: 2023-01-12
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Publication No.: US11987875B2Publication Date: 2024-05-21
- Inventor: Yong Wang , Doreen Wei Ying Yong , Bhaskar Jyoti Bhuyan , John Sudijono
- Applicant: Applied Materials, Inc.
- Applicant Address: US CA Santa Clara
- Assignee: Applied Materials, Inc.
- Current Assignee: Applied Materials, Inc.
- Current Assignee Address: US CA Santa Clara
- Agency: Servilla Whitney LLC
- Main IPC: C23C16/04
- IPC: C23C16/04 ; C23C16/02 ; C23C16/56 ; C23C22/77 ; C23C22/82

Abstract:
Methods of patterning semiconductor devices comprising selective deposition methods are described. A blocking layer is deposited on a metal surface of a semiconductor device before deposition of a dielectric material on a dielectric surface. Methods include exposing a substrate surface including a metal surface and a dielectric surface to a heterocyclic reactant comprising a headgroup and a tailgroup in a processing chamber and selectively depositing the heterocyclic reactant on the metal surface to form a passivation layer, wherein the heterocyclic headgroup selectively reacts and binds to the metal surface.
Public/Granted literature
- US20230142926A1 SEMICONDUCTOR DEVICE PATTERNING METHODS Public/Granted day:2023-05-11
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