Invention Grant
- Patent Title: Peak power management connectivity check in a memory device
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Application No.: US17248728Application Date: 2021-02-04
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Publication No.: US11990197B2Publication Date: 2024-05-21
- Inventor: Eleuterio Mannella , Massimo Rossini
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Lowenstein Sandler LLP
- Main IPC: G11C29/38
- IPC: G11C29/38 ; G06F1/04 ; G06F1/26

Abstract:
A memory device includes a plurality of memory dies, each memory die of the plurality of memory dies comprising a memory array and a power management component, operatively coupled with the memory array. The power management component sends a test value to one or more other power management components on one or more other memory dies of the plurality of memory dies and receives one or more other test values from the one or more other power management components. The power management component compares the test value and the one or more other test values to a set of expected values, and responsive to the test value and the one or more other test values matching the set of expected values, determines that signal connections between the power management component and the one or more other power management components are functional.
Public/Granted literature
- US20220199180A1 PEAK POWER MANAGEMENT CONNECTIVITY CHECK IN A MEMORY DEVICE Public/Granted day:2022-06-23
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