Invention Grant
- Patent Title: Methods for forming conductive vias, and associated devices and systems
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Application No.: US18048633Application Date: 2022-10-21
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Publication No.: US11990370B2Publication Date: 2024-05-21
- Inventor: Trupti D. Gawai , David S. Pratt , Ahmed M. Elsied , David A. Kewley , Dale W. Collins , Raju Ahmed , Chelsea M. Jordan , Radhakrishna Kotti
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Perkins Coie LLP
- Main IPC: H01L21/768
- IPC: H01L21/768 ; H01L23/522 ; H01L23/528

Abstract:
Methods of manufacturing semiconductor devices, and associated systems and devices, are disclosed herein. In some embodiments, a method of manufacturing a semiconductor device includes forming an opening in an electrically insulative material at least partially over a first electrically conductive feature and a second electrically conductive feature. The method can further include forming a ring of electrically conductive material around a sidewall of the insulative material defining the opening, wherein the ring of electrically conductive material includes (a) a first via portion over the first electrically conductive feature, (b) a second via portion over the second electrically conductive feature, and (c) connecting portions extending between the first and second via portions. Finally, the method can include removing the connecting portions of the ring of electrically conductive material to electrically isolate the first via portion from the second via portion.
Public/Granted literature
- US20230113573A1 METHODS FOR FORMING CONDUCTIVE VIAS, AND ASSOCIATED DEVICES AND SYSTEMS Public/Granted day:2023-04-13
Information query
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