Invention Grant
- Patent Title: Semiconductor device
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Application No.: US17349547Application Date: 2021-06-16
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Publication No.: US11990465B2Publication Date: 2024-05-21
- Inventor: Yasuyuki Morishita
- Applicant: RENESAS ELECTRONICS CORPORATION
- Applicant Address: JP Tokyo
- Assignee: RENESAS ELECTRONICS CORPORATION
- Current Assignee: RENESAS ELECTRONICS CORPORATION
- Current Assignee Address: JP Tokyo
- Agency: Rimon P.C.
- Priority: JP 20121141 2020.07.15
- Main IPC: H03K17/687
- IPC: H03K17/687 ; H01L27/02 ; H03K17/693

Abstract:
A first ESD protection circuit is provided between a first high-potential side power supply and a first low-potential side power supply of a first power supply system and a second ESD protection circuit is provided between a second high-potential side power supply and a second low-potential side power supply of a second power supply system. A coupling circuit includes a bidirectional diode and couples the first and second low-potential side power supplies. A first transistor is composed of an n-channel MOS transistor, has a drain coupled to the first high-potential side power supply of the first power supply system, and has a back gate coupled to the second low-potential side power supply of the second power supply system. A resistor element is inserted in series between the drain of the first transistor and the first high-potential side power supply.
Public/Granted literature
- US20220020739A1 SEMICONDUCTOR DEVICE Public/Granted day:2022-01-20
Information query
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