Invention Grant
- Patent Title: Method for forming a semiconductor structure having second isolation structures located between adjacent active areas
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Application No.: US17570483Application Date: 2022-01-07
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Publication No.: US11991876B2Publication Date: 2024-05-21
- Inventor: Junbo Pan , Jinghao Wang
- Applicant: CHANGXIN MEMORY TECHNOLOGIES, INC.
- Applicant Address: CN Anhui
- Assignee: Changxin Memory Technologies, Inc.
- Current Assignee: Changxin Memory Technologies, Inc.
- Current Assignee Address: CN Hefei
- Agency: Cooper Legal Group, LLC
- Priority: CN 2110768525.X 2021.07.07
- Main IPC: H10B12/00
- IPC: H10B12/00

Abstract:
Provided are a semiconductor structure and a method for forming same. The method includes the following operations. Active areas and first isolation structures disposed at intervals are provided. Second isolation structures located between adjacent active areas are provided, and top surfaces of the second isolation structures are higher than or flush with top surfaces of the active areas. A mask layer are formed, pattern openings of which expose part of the top surfaces of the active areas, and the second isolation structures are located at two opposite sides of part of the active areas. The part of the active areas exposed by the pattern openings and part of the first isolation structures are etched to form intermediate grooves at least exposing part of surfaces of the active areas. Bit line structures are formed, which are electrically connected to top surfaces exposed by the intermediate grooves.
Public/Granted literature
- US20230008414A1 SEMICONDUCTOR STRUCTURE AND METHOD FOR FORMING SAME Public/Granted day:2023-01-12
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