Invention Grant
- Patent Title: Memory device with dynamic processing level calibration
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Application No.: US17748366Application Date: 2022-05-19
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Publication No.: US12001286B2Publication Date: 2024-06-04
- Inventor: Larry J. Koudele , Bruce A. Liikanen
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Perkins Coie LLP
- Main IPC: G06F11/00
- IPC: G06F11/00 ; G06F11/07 ; G06F11/14 ; G11C11/56 ; G11C16/26 ; G11C29/02 ; G11C29/52 ; G11C29/44

Abstract:
A system includes a memory array; and a processing device coupled to the memory array. The processing device may be configured to iteratively adjust an active processing level, wherein, for each iteration, the processing device is configured to: determine a first set of read results corresponding to the active processing level, determine a second set of read results based on an offset processing level different than the active processing level, and incrementally adjust the active processing level based on a comparison of the first and the second read results.
Public/Granted literature
- US20220276930A1 MEMORY DEVICE WITH DYNAMIC PROCESSING LEVEL CALIBRATION Public/Granted day:2022-09-01
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