Invention Grant
- Patent Title: Local vertical interconnects for monolithic stack transistors
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Application No.: US17445013Application Date: 2021-08-13
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Publication No.: US12002805B2Publication Date: 2024-06-04
- Inventor: Heng Wu , Ruilong Xie , Chen Zhang , Eric Miller
- Applicant: International Business Machines Corporation
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agent Kelli D. Morin
- Main IPC: H01L27/06
- IPC: H01L27/06 ; H01L21/822 ; H01L21/8234 ; H01L27/088

Abstract:
A method for forming a stacked transistor includes forming a sacrificial cap over a first interconnect of a lower level transistor. The method further includes forming an upper level transistor above the sacrificial cap. The method further includes removing the sacrificial cap to form an opening such that the opening is delimited by the upper level transistor. The method further includes forming a second interconnect in the opening such that the second interconnect is in direct contact with the first interconnect.
Public/Granted literature
- US20230051674A1 LOCAL VERTICAL INTERCONNECTS FOR MONOLITHIC STACK TRANSISTORS Public/Granted day:2023-02-16
Information query
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