Invention Grant
- Patent Title: Dual gate vertical thin film transistors and methods for forming the same
-
Application No.: US17488368Application Date: 2021-09-29
-
Publication No.: US12002884B2Publication Date: 2024-06-04
- Inventor: Ming-Yen Chuang , Katherine H. Chiang , Yun-Feng Kao
- Applicant: Taiwan Semiconductor Manufacturing Company Limited
- Applicant Address: TW Hsinchu
- Assignee: Taiwan Semiconductor Manufacturing Company Limited
- Current Assignee: Taiwan Semiconductor Manufacturing Company Limited
- Current Assignee Address: TW Hsinchu
- Agency: The Marbury Law Group, PLLC
- Main IPC: H01L29/78
- IPC: H01L29/78 ; H01L29/51 ; H01L29/66

Abstract:
A semiconductor structure includes vertical stacks located over a substrate, wherein each of the vertical stacks includes from bottom to top, a bottom electrode, a dielectric pillar structure including a lateral opening therethrough, and a top electrode; layer stacks located over the vertical stacks, wherein each of the layer stacks includes an active layer and an outer gate dielectric and laterally surrounds a respective one of the vertical stacks; inner gate electrodes passing through a respective subset of the lateral openings in a respective row of vertical stacks that are arranged along a first horizontal direction; and outer gate electrodes laterally extending along the first horizontal direction and laterally surrounding a respective row of layer stacks.
Public/Granted literature
- US20230008902A1 VERTICAL TRANSISTORS AND METHODS FOR FORMING THE SAME Public/Granted day:2023-01-12
Information query
IPC分类: