Invention Grant
- Patent Title: Performing cyclic redundancy checks using parallel computing architectures
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Application No.: US17402341Application Date: 2021-08-13
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Publication No.: US12003253B2Publication Date: 2024-06-04
- Inventor: Andrea Miele
- Applicant: NVIDIA Corporation
- Applicant Address: US CA Santa Clara
- Assignee: NVIDIA Corporation
- Current Assignee: NVIDIA Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Davis Wright Tremaine LLP
- Main IPC: H03M13/09
- IPC: H03M13/09 ; G06F9/50 ; G06T1/20 ; H04L1/00
Abstract:
Apparatuses, systems, and techniques to compute cyclic redundancy checks use a graphics processing unit (GPU) to compute cyclic redundancy checks. For example, in at least one embodiment, an input data sequence is distributed among GPU threads for parallel calculation of an overall CRC value for the input data sequence according to various novel techniques described herein.
Public/Granted literature
- US20220173752A1 PERFORMING CYCLIC REDUNDANCY CHECKS USING PARALLEL COMPUTING ARCHITECTURES Public/Granted day:2022-06-02
Information query
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