Invention Grant
- Patent Title: Method of testing wafer
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Application No.: US17873921Application Date: 2022-07-26
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Publication No.: US12009302B2Publication Date: 2024-06-11
- Inventor: Yen-Hsung Ho , Chia-Yi Tseng , Chih-Hsun Lin , Kun-Tsang Chuang , Yung-Lung Hsu
- Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Applicant Address: TW Hsinchu
- Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Current Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Current Assignee Address: TW Hsinchu
- Agency: Birch, Stewart, Kolasch & Birch, LLP
- The original application number of the division: US17078523 2020.10.23
- Main IPC: H01L21/66
- IPC: H01L21/66 ; H01L23/522 ; H01L23/528 ; H01L23/544 ; H01L29/40

Abstract:
A method includes following steps. An image of a wafer is captured. A first contact region in the captured image at which the first conductive contact is rendered is identified. A second contact region in the captured image at which the second conductive contact is rendered is identified. The second conductive contact is determined as not shorted to the first conductive contact, in response to the identified second contact region in the captured image is darker than the identified first contact region in the captured image.
Public/Granted literature
- US20220359395A1 METHOD OF TESTING WAFER Public/Granted day:2022-11-10
Information query
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