Invention Grant
- Patent Title: Staircase structure for memory device
-
Application No.: US17447456Application Date: 2021-09-13
-
Publication No.: US12010838B2Publication Date: 2024-06-11
- Inventor: Zhenyu Lu , Jun Chen , Xiaowang Dai , Jifeng Zhu , Qian Tao , Yu Ru Huang , Si Ping Hu , Lan Yao , Li Hong Xiao , A Man Zheng , Kun Bao , Haohao Yang
- Applicant: Yangtze Memory Technologies Co., Ltd.
- Applicant Address: CN Hubei
- Assignee: Yangtze Memory Technologies Co., Ltd.
- Current Assignee: Yangtze Memory Technologies Co., Ltd.
- Current Assignee Address: CN Hubei
- Agency: Sterne, Kessler, Goldstein & Fox P.L.L.C.
- Priority: CN 1710750398.4 2017.08.28
- Main IPC: H10B41/35
- IPC: H10B41/35 ; H01L21/027 ; H01L21/311 ; H01L21/768 ; H01L23/528 ; H01L23/532 ; H01L23/535 ; H10B41/41 ; H10B43/27 ; H10B43/35 ; H10B43/50

Abstract:
A semiconductor structure is disclosed. The semiconductor structure includes a staircase structure disposed over a substrate. The staircase structure includes a plurality of layer stacks, where each layer stack is made of a first material layer over a portion of a second material layer. The staircase structure further includes a plurality of landing pads, where each landing pad is disposed over another portion of the second material layer of a respective layer stack.
Public/Granted literature
- US20230084008A1 STAIRCASE STRUCTURE FOR MEMORY DEVICE Public/Granted day:2023-03-16
Information query