Invention Grant
- Patent Title: Self aligned litho etch process patterning method
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Application No.: US18123820Application Date: 2023-03-20
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Publication No.: US12014926B2Publication Date: 2024-06-18
- Inventor: Chih-Min Hsiao , Chien-Wen Lai , Shih-Chun Huang , Yung-Sung Yen , Chih-Ming Lai , Ru-Gun Liu
- Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- Applicant Address: TW Hsinchu
- Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Current Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Current Assignee Address: TW Hsinchu
- Agency: STUDEBAKER & BRACKETT PC
- Main IPC: H01L21/033
- IPC: H01L21/033 ; H10B10/00

Abstract:
A method of defining a pattern includes forming a plurality of cut shapes and a first plurality of openings within a first layer of a multi-layer hard mask to expose first portions of the second layer. A plurality of etch stops is formed by implanting an etch rate modifying species in a portion of the plurality of cut shapes. The first layer is directionally etched at the plurality of cut shapes such that the plurality of etch stops remain. A spacer layer is formed on the first layer and the first portions. A second plurality of openings is formed within the spacer layer to expose second portions of the second layer. The spacer layer is directionally etched to remove the spacer layer from sidewalls of the plurality of etch stops. Portions of the second layer exposed through the first plurality of openings and the second plurality of openings are etched.
Public/Granted literature
- US20230230836A1 SELF ALIGNED LITHO ETCH PROCESS PATTERNING METHOD Public/Granted day:2023-07-20
Information query
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