Invention Grant
- Patent Title: Semiconductor packages having a die, an encapsulant, and a redistribution structure
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Application No.: US17727242Application Date: 2022-04-22
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Publication No.: US12021047B2Publication Date: 2024-06-25
- Inventor: Chung-Hao Tsai , Chia-Chia Lin , Kai-Chiang Wu , Chuei-Tang Wang , Chen-Hua Yu
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsinchu
- Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- Current Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- Current Assignee Address: TW Hsinchu
- Agency: Slater Matsil, LLP
- The original application number of the division: US16177643 2018.11.01
- Main IPC: H01L21/56
- IPC: H01L21/56 ; H01L21/48 ; H01L23/00 ; H01L23/14 ; H01L23/31 ; H01L23/48 ; H01L23/498 ; H01L23/522 ; H01L23/525 ; H01L23/66 ; H01L25/065 ; H01L25/07 ; H01L49/02

Abstract:
An embodiment is a device including an integrated circuit die having an active side and a back side, the back side being opposite the active side, a molding compound encapsulating the integrated circuit die, and a first redistribution structure overlying the integrated circuit die and the molding compound, the first redistribution structure including a first metallization pattern and a first dielectric layer, the first metallization pattern being electrically coupled to the active side of the integrated circuit die, at least a portion of the first metallization pattern forming an inductor.
Public/Granted literature
- US20220246559A1 Methods of Forming Semiconductor Packages Having a Die with an Encapsulant Public/Granted day:2022-08-04
Information query
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