Invention Grant
- Patent Title: Power-sensitive scan-chain testing
-
Application No.: US18159344Application Date: 2023-01-25
-
Publication No.: US12025661B1Publication Date: 2024-07-02
- Inventor: Balaji Upputuri , Sreekanth G. Pai , Kushal Kamal
- Applicant: Marvell Asia Pte Ltd
- Applicant Address: SG Singapore
- Assignee: Marvell Asia Pte Ltd
- Current Assignee: Marvell Asia Pte Ltd
- Current Assignee Address: SG Singapore
- Main IPC: G01R31/3185
- IPC: G01R31/3185

Abstract:
A method of scan-chain testing of an integrated circuit device having a plurality of respective scan-chain paths, at least some of the respective scan-chain paths being designated as having resource constraints, includes propagating a respective scan-chain data pattern through each of the respective scan-chain paths, and gating each respective scan-chain path designated as having resource constraints, to reduce a rate of scan-chain data propagation through the respective scan-chain path, without gating any scan-chain path not designated as having resource constraints. Scan-chain paths may be designated as having resource constraints because of high power consumption or data congestion.
Information query
IPC分类: