Invention Grant
- Patent Title: DDR DIMM, memory system and operation method thereof
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Application No.: US17994324Application Date: 2022-11-27
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Publication No.: US12026050B2Publication Date: 2024-07-02
- Inventor: Liang Zhang , Ming Huang
- Applicant: INNOSILICON MICROELECTRONICS (WUHAN) CO., LTD.
- Applicant Address: CN Wuhan
- Assignee: INNOSILICON MICROELECTRONICS (WUHAN) CO., LTD.
- Current Assignee: INNOSILICON MICROELECTRONICS (WUHAN) CO., LTD.
- Current Assignee Address: CN Wuhan
- Priority: CN 2210526445.8 2022.05.16
- Main IPC: G06F11/10
- IPC: G06F11/10

Abstract:
A double data rate dual-in-line memory module (DDR DIMM), a memory system and an operation method thereof using a data buffer for error correction are disclosed. In an example, the DDR DIMM includes a first channel including a first group of DRAM chips and a first data buffer corresponding to the first group of DRAM chips; wherein: the first data buffer is configured to obtain all write data signals input to the first channel, encode write data of all the write data signals to generate a first ECC, and send the first ECC and the write data to the first group of DRAM chips in a write operation. The disclosure can realize excellent error detection and error correction within the memory module and can greatly reduce bit error rate of the entire memory module.
Public/Granted literature
- US20230367671A1 DDR DIMM, MEMORY SYSTEM AND OPERATION METHOD THEREOF Public/Granted day:2023-11-16
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