Invention Grant
- Patent Title: Mitigating interference between commands for different access requests in LPDDR4 memory system
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Application No.: US16923764Application Date: 2020-07-08
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Publication No.: US12026107B2Publication Date: 2024-07-02
- Inventor: Kazuhito Tanaka
- Applicant: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
- Applicant Address: JP Osaka
- Assignee: PANASONIC AUTOMOTIVE SYSTEMS CO., LTD.
- Current Assignee: PANASONIC AUTOMOTIVE SYSTEMS CO., LTD.
- Current Assignee Address: JP Kanagawa
- Agency: GREENBLUM & BERNSTEIN, P.L.C.
- Priority: JP 18186028 2018.09.28
- Main IPC: G11C7/22
- IPC: G11C7/22 ; G06F1/04 ; G06F13/16 ; G11C7/10 ; G11C8/18 ; G11C11/406 ; G11C11/4076 ; G11C11/4096

Abstract:
A command control system is provided which is configured to optimally set an output timing of a RAS command and an output timing of a CAS command for access requests different from each other. The command control system is configured to, when an output timing of a second RAS command is set in a first cycle time period which is a cycle starting from the reference time point, determine whether or not the second RAS command is output to a storage device in the first cycle time period in accordance with whether or not an output timing of a first CAS command is set in a second cycle time period constituted by a prescribed number of the cycles subsequent to the reference time point.
Public/Granted literature
- US20200331485A1 COMMAND CONTROL SYSTEM, VEHICLE, COMMAND CONTROL METHOD AND NON-TRANSITORY COMPUTER-READABLE MEDIUM Public/Granted day:2020-10-22
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