Invention Grant
- Patent Title: Partial block handling protocol in a non-volatile memory device
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Application No.: US17825439Application Date: 2022-05-26
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Publication No.: US12027211B2Publication Date: 2024-07-02
- Inventor: Zhongguang Xu , Tingjun Xie , Murong Lang
- Applicant: MICRON TECHNOLOGY, INC.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Lowenstein Sandler LLP
- Main IPC: G11C16/10
- IPC: G11C16/10 ; G11C16/08 ; G11C16/26 ; G11C16/32 ; G11C16/34

Abstract:
A processing device in a memory sub-system initiates a partial block handling protocol for a closed block of a memory device. The block includes a plurality of wordlines. The processing device further sends a first programming command to the memory device to program one or more wordlines of the block with first padding data. The one or more wordlines are adjacent to a last wordline of the block programmed before the block was closed. In addition, the processing device sends a second programming command to the memory device to concurrently program a remaining set of the plurality of wordlines of the block to a threshold voltage.
Public/Granted literature
- US20230386578A1 PARTIAL BLOCK HANDLING PROTOCOL IN A NON-VOLATILE MEMORY DEVICE Public/Granted day:2023-11-30
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