An integrated circuit (IC) device includes a first active region extending along a first direction, a first pair of gate regions extending across the first active region along a second direction transverse to the first direction, and a first metal layer. The first pair of gate regions and the first active region configure a first program transistor and a first read transistor sharing a common source/drain region. The first metal layer includes a first program word line pattern over and coupled to the gate region of the first program transistor, a first read word line pattern over and coupled to the gate region of the first read transistor, a first source line pattern coupled to another source/drain region of the first program transistor, and a first bit line pattern coupled to another source/drain region of the first read transistor.