Invention Grant
- Patent Title: Three-dimensional memory device and method
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Application No.: US17814626Application Date: 2022-07-25
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Publication No.: US12027412B2Publication Date: 2024-07-02
- Inventor: Han-Jong Chia , Meng-Han Lin , Sheng-Chen Wang , Feng-Cheng Yang , Chung-Te Lin
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsinchu
- Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Current Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Current Assignee Address: TW Hsinchu
- Agency: Slater Matsil, LLP
- The original application number of the division: US16951595 2020.11.18
- Main IPC: H01L21/762
- IPC: H01L21/762 ; G11C7/18 ; H10B51/20 ; H10B99/00

Abstract:
A method of forming a three-dimensional (3D) memory device includes: forming a layer stack over a substrate, the layer stack including alternating layers of a first dielectric material and a second dielectric material; forming trenches extending through the layer stack; replacing the second dielectric material with an electrically conductive material to form word lines (WLs); lining sidewalls and bottoms of the trenches with a ferroelectric material; filling the trenches with a third dielectric material; forming bit lines (BLs) and source lines (SLs) extending vertically through the third dielectric material; removing portions of the third dielectric material to form openings in the third dielectric material between the BLs and the SLs; forming a channel material along sidewalls of the openings; and filling the openings with a fourth dielectric material.
Public/Granted literature
- US20220359270A1 Three-Dimensional Memory Device and Method Public/Granted day:2022-11-10
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