Invention Grant
- Patent Title: Source or drain structures with high germanium concentration capping layer
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Application No.: US16913320Application Date: 2020-06-26
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Publication No.: US12027417B2Publication Date: 2024-07-02
- Inventor: Cory Bomberger , Suresh Vishwanath , Yulia Tolstova , Pratik Patel , Szuya S. Liao , Anand S. Murthy
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Schwabe, Williamson & Wyatt, P.C.
- Main IPC: H01L21/768
- IPC: H01L21/768 ; H01L21/02 ; H01L21/28 ; H01L21/3215 ; H01L29/06 ; H01L29/08 ; H01L29/423 ; H01L29/49 ; H01L29/66

Abstract:
Integrated circuit structures having source or drain structures with a high germanium concentration capping layer are described. In an example, an integrated circuit structure includes source or drain structures including an epitaxial structure embedded in a fin at a side of a gate stack. The epitaxial structure has a lower semiconductor layer and a capping semiconductor layer on the lower semiconductor layer with an abrupt interface between the capping semiconductor layer and the lower semiconductor layer. The lower semiconductor layer includes silicon, germanium and boron, the germanium having an atomic concentration of less than 40% at the abrupt interface. The capping semiconductor layer includes silicon, germanium and boron, the germanium having an atomic concentration of greater than 50% at the abrupt interface and throughout the capping semiconductor layer.
Public/Granted literature
- US20210407851A1 SOURCE OR DRAIN STRUCTURES WITH HIGH GERMANIUM CONCENTRATION CAPPING LAYER Public/Granted day:2021-12-30
Information query
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