Invention Grant
- Patent Title: Clamping circuit integrated on gallium nitride semiconductor device and related semiconductor device
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Application No.: US18162725Application Date: 2023-02-01
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Publication No.: US12027514B2Publication Date: 2024-07-02
- Inventor: Yaobin Guan , Jianjian Sheng
- Applicant: INNOSCIENCE (ZHUHAI) TECHNOLOGY CO., LTD.
- Applicant Address: CN Zhuhai
- Assignee: INNOSCIENCE (ZHUHAI) TECHNOLOGY CO., LTD.
- Current Assignee: INNOSCIENCE (ZHUHAI) TECHNOLOGY CO., LTD.
- Current Assignee Address: CN Zhuhai
- Agency: Li & Cai Intellectual Property (USA) Office
- Priority: CN 2010014156.0 2020.01.07
- Main IPC: H01L27/02
- IPC: H01L27/02 ; H01L23/31 ; H01L27/06 ; H01L29/20 ; H01L29/205 ; H01L29/778 ; H01L49/02 ; H03K17/082

Abstract:
A semiconductor device and a clamping circuit including a substrate; a first semiconductor layer, arranged on the substrate and composed of a III-nitride semiconductor material; a second semiconductor layer, arranged on the first semiconductor layer and composed of a III-nitride semiconductor material; a power transistor structure, including a gate structure, a drain structure and a source structure arranged on the second semiconductor layer; the first transistor structures, arranged on the second semiconductor layer; and the second transistor structures, arranged on the second semiconductor layer in series. One end of the first transistor structures and one end of the second transistor structures are jointly electrically connected to the drain structure of the power transistor structure, and the other end of the first transistor structures and the other end of the second transistor structures are jointly electrically connected to the source structure of the power transistor structure.
Public/Granted literature
- US20230178541A1 CLAMPING CIRCUIT INTEGRATED ON GALLIUM NITRIDE SEMICONDUCTOR DEVICE AND RELATED SEMICONDUCTOR DEVICE Public/Granted day:2023-06-08
Information query
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