Invention Grant
- Patent Title: Pillar-shaped semiconductor device having connection material layer for anchoring wiring conductor layer and method for producing the same
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Application No.: US17693941Application Date: 2022-03-14
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Publication No.: US12027627B2Publication Date: 2024-07-02
- Inventor: Fujio Masuoka , Nozomu Harada
- Applicant: Unisantis Electronics Singapore Pte. Ltd.
- Applicant Address: SG Singapore
- Assignee: UNISANTIS ELECTRONICS SINGAPORE PTE. LTD.
- Current Assignee: UNISANTIS ELECTRONICS SINGAPORE PTE. LTD.
- Current Assignee Address: SG Singapore
- Agency: Crowell & Moring LLP
- The original application number of the division: US16580510 2019.09.24
- Main IPC: H01L29/786
- IPC: H01L29/786 ; H01L21/225 ; H01L21/324 ; H01L27/092 ; H01L29/40 ; H01L29/417 ; H01L29/423 ; H01L29/66

Abstract:
An SGT circuit includes a first conductor layer which contains a semiconductor atom, which is in contact with an N+ region and a P+ region of a Si pillar, or a TiN layer, and whose outer circumference is located outside an outer circumference of a SiO2 layer in plan view, and a second conductor layer which contains a metal atom, which is connected to an outer periphery of the first conductor layer, and which extends in a horizontal direction.
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Information query
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