Invention Grant
- Patent Title: System and method for receiver equalization and stressed eye testing methodology for DDR5 memory controller
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Application No.: US18298305Application Date: 2023-04-10
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Publication No.: US12032018B2Publication Date: 2024-07-09
- Inventor: Gang Zhao , Howard David , Xusheng Liu , Yongyao Li
- Applicant: HUAWEI TECHNOLOGIES CO., LTD.
- Applicant Address: CN Shenzhen
- Assignee: HUAWEI TECHNOLOGIES CO., LTD.
- Current Assignee: HUAWEI TECHNOLOGIES CO., LTD.
- Current Assignee Address: CN Shenzhen
- Agent James Harrison
- Main IPC: G06F11/00
- IPC: G06F11/00 ; G01R31/317 ; G11C29/02 ; G11C29/56

Abstract:
A method for bit error rate testing a processing unit using a bit error rate tester (BERT) includes transmitting a signal pair to a receiver of the processing unit, the signal pair having jitter levels complying with a jitter threshold, tuning the signal pair to obtain a first stressed eye measurement for the receiver, wherein the first stressed eye measurement complies with a stressed eye mask, placing the processing unit into a loop-back mode, wherein data transmitted to the processing unit by the BERT is transmitted back to the BERT, transmitting a data pattern to the processing unit, receiving a looped back version of the data pattern from the processing unit, and calculating a bit error rate in accordance with the data pattern and the looped back version of the data pattern.
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