Invention Grant
- Patent Title: Locking and position status detection scheme for an electronic device
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Application No.: US17033561Application Date: 2020-09-25
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Publication No.: US12032415B2Publication Date: 2024-07-09
- Inventor: Praveen Kashyap Ananta Bhat , Tarakesava Reddy Koki , Jaison Fernandez , Ruchi Sitaram Padekar
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Alliance IP, LLC
- Main IPC: G06F1/16
- IPC: G06F1/16

Abstract:
An example apparatus comprises a first member with a first surface, where the first member is movable relative to a second member with a second surface. The first member comprises a first magnet configured to produce a first magnetic field. The second member comprises a sensor operatively connected to a processor and a second magnet adjacent to the sensor. In a first position, the first magnet and the second magnet are engaged to magnetically hold the first member to the second member such that at least a portion of the first surface of the first member opposes at least a portion of the second surface of the second member. In the first position, the sensor is to detect the first magnetic field produced by the first magnet and is to send a signal to the processor in response to detecting the first magnetic field produced by the first magnet.
Public/Granted literature
- US20210011520A1 LOCKING AND POSITION STATUS DETECTION SCHEME FOR AN ELECTRONIC DEVICE Public/Granted day:2021-01-14
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