Data protection method for memory and storage device thereof
Abstract:
The present disclosure provides a system. The system includes a memory device configured to store memory data. The memory device includes a plurality of valid memory blocks that comprises a first valid memory block and a second valid memory block. The system also includes a controller, having a processor and a memory, operatively coupled to the first and second valid memory blocks. The controller is configured to, in an operation on redundant array of independent disks (RAID), generate an address chain in a check code factor of the plurality of valid memory blocks, the address chain comprising a first address point pointing to the first valid memory block. The controller is also configured to generate, in the first valid memory block, a second address pointer, the second address pointer pointing to the second valid memory block.
Public/Granted literature
Information query
Patent Agency Ranking
0/0