Invention Grant
- Patent Title: Method of forming the spacers on lateral flanks of a transistor gate using successive implantation phases
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Application No.: US17652324Application Date: 2022-02-24
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Publication No.: US12033859B2Publication Date: 2024-07-09
- Inventor: Valentin Bacquie , Nicolas Posseme
- Applicant: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES
- Applicant Address: FR Paris
- Assignee: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES
- Current Assignee: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES
- Current Assignee Address: FR Paris
- Agency: Oblon, McClelland, Maier & Neustadt, L.L.P.
- Priority: FR 01864 2021.02.25
- Main IPC: H01L21/28
- IPC: H01L21/28 ; H01L21/3115

Abstract:
A method is provided for forming spacers of a gate of a transistor, including: providing an active layer surmounted by a gate; forming a dielectric layer covering the gate and the active layer, the dielectric layer having lateral portions and basal portions; anisotropically modifying the basal portions by implantation of light ions, forming modified basal portions; and removing the modified basal portions by selective etching, so as to form the spacers on the lateral flanks of the gate from the unmodified lateral portions, in which, before the removing step, the anisotropic modification of the basal portions includes n successive implantation phases having implantation energies Γi (i=1 . . . n) which are distinct from each other, the n phases being configured to implant the light ions at different nominal implantation depths.
Public/Granted literature
- US20220270880A1 METHOD OF FORMING THE SPACERS OF A TRANSISTOR GATE Public/Granted day:2022-08-25
Information query
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