Invention Grant
- Patent Title: Method for manufacturing semiconductor device
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Application No.: US18142213Application Date: 2023-05-02
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Publication No.: US12033867B2Publication Date: 2024-07-09
- Inventor: Shunpei Yamazaki , Junichi Koezuka
- Applicant: Semiconductor Energy Laboratory Co., Ltd.
- Applicant Address: JP Atsugi
- Assignee: Semiconductor Energy Laboratory Co., Ltd.
- Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
- Current Assignee Address: JP Atsugi
- Agency: Robinson Intellectual Property Law Office, P.C.
- Agent Eric J. Robinson
- Priority: JP 10042024 2010.02.26
- The original application number of the division: US13029148 2011.02.17
- Main IPC: H01L29/49
- IPC: H01L29/49 ; G02F1/1343 ; G02F1/1368 ; H01L21/385 ; H01L27/12 ; H01L29/417 ; H01L29/51 ; H01L29/66 ; H01L29/786

Abstract:
In a transistor including an oxide semiconductor layer, an oxide insulating layer is formed so as to be in contact with the oxide semiconductor layer. Then, oxygen is introduced (added) to the oxide semiconductor layer through the oxide insulating layer, and heat treatment is performed. Through these steps of oxygen introduction and heat treatment, impurities such as hydrogen, moisture, a hydroxyl group, or hydride are intentionally removed from the oxide semiconductor layer, so that the oxide semiconductor layer is highly purified.
Public/Granted literature
- US20230352312A1 METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE Public/Granted day:2023-11-02
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