- Patent Title: Backside or frontside through substrate via (TSV) landing on metal
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Application No.: US17144717Application Date: 2021-01-08
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Publication No.: US12033919B2Publication Date: 2024-07-09
- Inventor: Zheng-Xun Li , Min-Feng Kao , Hsing-Chih Lin , Jen-Cheng Liu , Dun-Nian Yaung
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsinchu
- Agency: Eschweiler & Potashnik, LLC
- Main IPC: H01L23/48
- IPC: H01L23/48 ; H01L21/768

Abstract:
Some embodiments relate to a semiconductor structure including a semiconductor substrate, and n interconnect structure disposed over the semiconductor substrate. The interconnect structure includes a dielectric structure and a plurality of metal lines that are stacked over one another in the dielectric structure. A through substrate via (TSV) extends through the semiconductor substrate to contact a metal line of the plurality of metal lines. A protective sleeve is disposed along outer sidewalls of the TSV and separates the outer sidewalls of the TSV from the dielectric structure of the interconnect structure.
Public/Granted literature
- US20220223498A1 BACKSIDE OR FRONTSIDE THROUGH SUBSTRATE VIA (TSV) LANDING ON METAL Public/Granted day:2022-07-14
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