An apparatus comprises a memory communicatively coupled to a processor. The memory may be configured to store data exchange requests. The processor may be configured to determine that a data exchange request of the data exchange requests comprises a status indicating that the data exchange request is incomplete, generate a priority value for the data exchange request indicating a batch priority associated with the data exchange request, and assign a weight for the data exchange request indicating that the data exchange request is expected to be completed in one or more batch orders. Further, the processor is configured to generate a batch order comprising a position in a queue corresponding to the batch priority and complete the data exchange request in the decentralized network in accordance with the position in the batch order.