Invention Grant
- Patent Title: System and method for diagnosing design rule check violations
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Application No.: US17876118Application Date: 2022-07-28
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Publication No.: US12039249B2Publication Date: 2024-07-16
- Inventor: Yu-Chen Huang , Heng-Yi Lin , Yi-Lin Chuang
- Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicant Address: TW Hsinchu
- Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
- Current Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
- Current Assignee Address: TW Hsinchu
- Agency: FOLEY & LARDNER LLP
- Main IPC: G06F30/398
- IPC: G06F30/398

Abstract:
A system and method for fixing DRC violations includes receiving a layout pattern having a design rule check (DRC) violation therein, determining that the layout pattern is an inlier based upon a comparison of the layout pattern with a plurality of previously analyzed layout patterns. The comparison may be performed by an anomaly detection algorithm. The system and method may also include selecting a recipe from a pool of recipes previously applied to the plurality of previously analyzed layout patterns for fixing the DRC violation in the layout clip upon determining that the layout pattern is an inlier.
Public/Granted literature
- US20220391574A1 SYSTEM AND METHOD FOR DIAGNOSING DESIGN RULE CHECK VIOLATIONS Public/Granted day:2022-12-08
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