A method for manufacturing a semiconductor device comprises: forming isolation layers in a front surface of an upper wafer substrate; forming a through hole that exposes one of the isolation layers, through the upper wafer substrate from a back surface of the upper wafer substrate; forming a first dielectric layer that fills the through hole; defining a lower wafer including a lower wafer substrate, a second dielectric layer defined on the lower wafer substrate, and a first wiring line disposed in the second dielectric layer; bonding a top surface of the second dielectric layer and a bottom surface of the first dielectric layer; forming a third dielectric layer on the front surface of the upper wafer substrate; forming a through via that passes through the third dielectric layer, the one isolation layer, the first dielectric layer; and forming a second wiring line coupled to the through via.