Invention Grant
- Patent Title: Output buffer circuit
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Application No.: US18080378Application Date: 2022-12-13
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Publication No.: US12047068B2Publication Date: 2024-07-23
- Inventor: Dzung T. Tran , Shivraj G. Dharne
- Applicant: GlobalFoundries U.S. Inc.
- Applicant Address: US NY Malta
- Assignee: GlobalFoundries U.S. Inc.
- Current Assignee: GlobalFoundries U.S. Inc.
- Current Assignee Address: US NY Malta
- Agency: Calderon Safran & Wright, PC
- Agent David Cain; Andrew M. Calderon
- Main IPC: H03K19/01
- IPC: H03K19/01 ; H03K19/003 ; H03K19/0185

Abstract:
The present disclosure relates to a structure including a level shifter circuit which receives an input signal and at least one voltage reference signal and outputs at least one level shifted output signal, a pre-driver circuit which receives the at least one level shifted output signal and outputs at least one pre-driver output signal, the pre-driver circuit including at least one delay circuit, and a main driver circuit which receives the at least one pre-driver output signal and outputs a main driver output signal.
Public/Granted literature
- US20240195419A1 OUTPUT BUFFER CIRCUIT Public/Granted day:2024-06-13
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