- Patent Title: RIC with a dedicated IO thread and multiple data processing threads
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Application No.: US17384781Application Date: 2021-07-25
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Publication No.: US12047245B2Publication Date: 2024-07-23
- Inventor: Amit Singh
- Applicant: VMware LLC
- Applicant Address: US CA Palo Alto
- Assignee: VMware LLC
- Current Assignee: VMware LLC
- Current Assignee Address: US CA Palo Alto
- Agency: Quarles & Brady LLP
- Main IPC: H04W12/37
- IPC: H04W12/37 ; G06F8/60 ; G06F9/38 ; G06F9/4401 ; G06F9/455 ; G06F9/48 ; G06F9/50 ; G06F9/54 ; G06F11/34 ; G06F30/331 ; G06N20/00 ; H04B7/0452 ; H04L41/122 ; H04L41/40 ; H04L43/10 ; H04L69/324 ; H04W8/18 ; H04W8/20 ; H04W12/037 ; H04W12/08 ; H04W24/02 ; H04W28/06 ; H04W28/086 ; H04W28/16 ; H04W40/24 ; H04W48/14 ; H04W72/02 ; H04W72/044 ; H04W72/0453 ; H04W72/20 ; H04W72/29 ; H04W72/51 ; H04W72/52 ; H04W36/10 ; H04W84/04

Abstract:
To provide a low latency near RT RIC, some embodiments separate the RIC's functions into several different components that operate on different machines (e.g., execute on VMs or Pods) operating on the same host computer or different host computers. Some embodiments also provide high speed interfaces between these machines. Some or all of these interfaces operate in non-blocking, lockless manner in order to ensure that critical near RT RIC operations (e.g., datapath processes) are not delayed due to multiple requests causing one or more components to stall. In addition, each of these RIC components also has an internal architecture that is designed to operate in a non-blocking manner so that no one process of a component can block the operation of another process of the component. All of these low latency features allow the near RT RIC to serve as a high speed IO between the E2 nodes and the xApps.
Public/Granted literature
- US20220283843A1 RIC WITH A DEDICATED IO THREAD AND MULTIPLE DATA PROCESSING THREADS Public/Granted day:2022-09-08
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