Invention Grant
- Patent Title: Package structure and manufacturing method thereof
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Application No.: US17684416Application Date: 2022-03-02
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Publication No.: US12051639B2Publication Date: 2024-07-30
- Inventor: Chih-Chiang Tsao , Chao-Wei Chiu , Jen-Jui Yu , Hsiu-Jen Lin , Ching-Hua Hsieh
- Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicant Address: TW Hsinchu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsinchu
- Agency: JCIPRNET
- Main IPC: H01L23/498
- IPC: H01L23/498 ; H01L21/48 ; H01L23/00 ; H01L25/065 ; H01L25/10 ; H01L23/367 ; H01L23/538

Abstract:
A package structure includes a first package, a second package, a conductive spacer, and a flux portion. The first package includes a semiconductor die. The second package is stacked to the first package. The conductive spacer is disposed between and electrically couples the first package and the second package. The flux portion is disposed between and electrically couples the first package and the conductive spacer, where the flux portion includes a first portion and a second portion separating from the first portion by a gap, and the first portion and the second portion are symmetric about an extending direction of the gap. The gap is overlapped with the conductive spacer.
Public/Granted literature
- US20230282555A1 PACKAGE STRUCTURE AND MANUFACTURING METHOD THEREOF Public/Granted day:2023-09-07
Information query
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