Invention Grant
- Patent Title: Semiconductor package and method
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Application No.: US17412966Application Date: 2021-08-26
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Publication No.: US12051650B2Publication Date: 2024-07-30
- Inventor: Jiun Yi Wu , Chen-Hua Yu , Chung-Shi Liu
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsinchu
- Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Current Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Current Assignee Address: TW Hsinchu
- Agency: Slater Matsil, LLP
- Main IPC: H01L23/538
- IPC: H01L23/538 ; H01L21/48 ; H01L23/498 ; H01L25/00 ; H01L25/065 ; H01L23/00

Abstract:
A semiconductor structure includes a first redistribution structure, a first local interconnect component disposed on the first redistribution structure, and a first interconnect structure over a second side of the first local interconnect component. The first local interconnect component includes a first plurality of redistribution layers. The first plurality of redistribution layers includes a first plurality of conductive features on a first side of the first local interconnect component. Each of the first plurality of conductive features are coupled to respective conductive features of the first redistribution structure. The first interconnect structure includes a second plurality of conductive features and a third plurality of conductive features. The second plurality of conductive features are electrically coupled to the third plurality of conductive features through the first local interconnect component.
Public/Granted literature
- US20230069031A1 Semiconductor Package and Method Public/Granted day:2023-03-02
Information query
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