Invention Grant
- Patent Title: Method for manufacturing semiconductor structure with single side capacitor
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Application No.: US17748869Application Date: 2022-05-19
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Publication No.: US12051719B2Publication Date: 2024-07-30
- Inventor: Yu-Min Chou , Shih-Fan Kuan
- Applicant: NANYA TECHNOLOGY CORPORATION
- Applicant Address: TW New Taipei
- Assignee: NANYA TECHNOLOGY CORPORATION
- Current Assignee: NANYA TECHNOLOGY CORPORATION
- Current Assignee Address: TW New Taipei
- Agency: MUNCY, GEISSLER, OLDS & LOWE, P.C.
- Main IPC: H10B12/00
- IPC: H10B12/00 ; H01L23/522 ; H01L49/02

Abstract:
The present disclosure provides a method of manufacturing a semiconductor structure. The method includes: providing a substrate; forming a first nitride layer, a first sacrificial layer, a second nitride layer, a second sacrificial layer and a third nitride layer in sequence over the substrate; forming a first opening and a second opening, wherein the first opening exposes a first landing pad in the substrate, and the second opening exposes a second landing pad in the substrate; forming a first electrode in the first opening and a second electrode in the second opening; removing the first sacrificial layer and the second sacrificial layer concurrently; and forming a conductive layer, conformal to the first electrode, the second electrode, the first nitride layer, the second nitride layer and the third nitride layer.
Public/Granted literature
- US20230402501A1 METHOD FOR MANUFACTURING SEMICONDUCTOR STRUCTURE WITH SINGLE SIDE CAPACITOR Public/Granted day:2023-12-14
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