Power management circuit operable with group delay
Abstract:
A power management circuit operable with group delay is provided. In embodiments disclosed herein, the power management circuit includes a voltage processing circuit configured to receive a first time-variant target voltage having a first group delay relative to a time-variant target voltage and a second time-variant target voltage having a second group delay relative to the time-variant target voltage. Accordingly, the voltage processing circuit generates a windowed time-variant target voltage higher than or equal to a highest one of the first time-variant target voltage and the second time-variant target voltage in a group delay tolerance window(s) defined by the first group delay and the second group delay. As a result, the power management circuit can generate a time-variant voltage based on the windowed time-variant target voltage to help a power amplifier to avoid amplitude clipping when amplifying an analog signal.
Public/Granted literature
Information query
Patent Agency Ranking
0/0