Invention Grant
- Patent Title: Techniques for partial writes
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Application No.: US17456994Application Date: 2021-11-30
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Publication No.: US12056395B2Publication Date: 2024-08-06
- Inventor: Taeksang Song , Chinnakrishnan Ballapuram , Saira Samar Malik
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Holland & Hart LLP
- Main IPC: G06F3/06
- IPC: G06F3/06 ; G06F12/02 ; G06F12/0868

Abstract:
Methods, systems, and devices for improved techniques for partial writes are described. A memory device may include a non-volatile memory and a volatile memory configured to operate as a cache for the non-volatile memory. The memory device may receive, from a host device, a write command for a first data set provided by the host device. Based on the write command, the memory device may store the first data set in a buffer coupled with a volatile memory. After storing the first data set in the buffer, the memory device may communicate to the volatile memory a set of data that includes the first data set and a second data set. The first data set and the second data may be associated with adjacent addresses for the volatile memory and may each have sizes smaller than a threshold size associated with the volatile memory.
Public/Granted literature
- US20220188029A1 TECHNIQUES FOR PARTIAL WRITES Public/Granted day:2022-06-16
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