Invention Grant
- Patent Title: Semiconductor device including a level shifter and method of mitigating a delay between input and output signals
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Application No.: US18447372Application Date: 2023-08-10
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Publication No.: US12057832B2Publication Date: 2024-08-06
- Inventor: Jerrin Pathrose Vareed , Shiba Mohanty
- Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicant Address: TW Hsinchu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsinchu
- Agency: Jones Day
- The original application number of the division: US17571690 2022.01.10
- Main IPC: H03K19/0185
- IPC: H03K19/0185 ; H03K3/037

Abstract:
A semiconductor device includes an input, a level shifter, an output, and a switch module. The input is configured to receive an input signal in a first voltage domain. The level shifter is connected to the input and is configured to shift the input signal from the first voltage domain to a second voltage domain. The switch module is configured to connect one of the input and the level shifter to the output. A method of mitigating a delay between input and output signals of the semiconductor device is also disclosed.
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