Invention Grant
- Patent Title: Common mode logic based quadrature coupled injection locked frequency divider with internal power-supply jitter compensation
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Application No.: US17520050Application Date: 2021-11-05
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Publication No.: US12057839B2Publication Date: 2024-08-06
- Inventor: Yatin Gilhotra
- Applicant: Synopsys, Inc.
- Applicant Address: US CA Sunnyvale
- Assignee: SYNOPSYS, INC.
- Current Assignee: SYNOPSYS, INC.
- Current Assignee Address: US CA Sunnyvale
- Agency: Lewis Roca Rothgerber Christie LLP
- Main IPC: H03K21/02
- IPC: H03K21/02 ; H03L7/193

Abstract:
A circuit includes a clock generator, a frequency divider, and a first biasing circuit. The clock generator generates a clock signal of a first frequency. The frequency divider includes a first pair of cross coupled transistors. The frequency divider produces the clock signal of a second frequency. The first biasing circuit is coupled with the first pair of cross coupled transistors of the frequency divider. The first biasing circuit is adapted to enable a change in a transconductance of the first pair of cross coupled transistors to stabilize a phase angle between the clock signal at the first frequency and the clock signal at the second frequency.
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