Invention Grant
- Patent Title: Semiconductor structure with a logic device and a memory device being formed in different levels, and method of forming the same
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Application No.: US17837982Application Date: 2022-06-10
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Publication No.: US12058869B2Publication Date: 2024-08-06
- Inventor: Bo-Feng Young , Han-Jong Chia , Sai-Hooi Yeong , Yu-Ming Lin , Chung-Te Lin
- Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
- Applicant Address: TW Hsinchu
- Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
- Current Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
- Current Assignee Address: TW Hsinchu
- Agency: WPAT LAW
- Agent Anthony King
- The original application number of the division: US16904557 2020.06.18
- Main IPC: H10B51/20
- IPC: H10B51/20 ; H01L21/768 ; H01L21/822 ; H01L23/48 ; H01L27/06 ; H01L29/66 ; H01L29/78 ; H10B10/00 ; H10B51/30 ; H10B51/40
Abstract:
The present disclosure provides a semiconductor structure, including a first layer including a logic device, a second layer over the first layer including a first type memory device, and a though silicon via (TSV) electrically connecting the logic device and the first type memory device.
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