Invention Grant
- Patent Title: Page buffer circuit, semiconductor memory apparatus including page buffer circuit, and operating method of semiconductor memory apparatus
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Application No.: US17726986Application Date: 2022-04-22
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Publication No.: US12062399B2Publication Date: 2024-08-13
- Inventor: Hyung Jin Choi
- Applicant: SK hynix Inc.
- Applicant Address: KR Icheon-si Gyeonggi-do
- Assignee: SK hynix Inc.
- Current Assignee: SK hynix Inc.
- Current Assignee Address: KR Icheon-si
- Agency: William Park & Associates Ltd.
- Priority: KR 20210157771 2021.11.16
- Main IPC: G11C16/26
- IPC: G11C16/26 ; G11C16/04 ; G11C16/10 ; G11C16/34
Abstract:
A page buffer circuit includes a sensing latch circuit and a caching latch circuit. The sensing latch circuit is configured to receive and sense data that is stored in a memory cell during a normal read operation. The caching latch circuit is configured to receive and sense the data that is stored in the memory cell during a suspend read operation.
Public/Granted literature
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